Andreas Fellner

» Ph.D. Student

I am a Ph.D. student at Austrian Insititute of Technology (AIT) supervised at TU Wien by Prof. Georg Weissenbacher, working on model based testing.
In 2014 I graduated from TU Wien, TU Dresden and Free University of Bolzano with a M.Sc. degree in Computational Logic.
After which, I spent a year at the graduate school of IST Austria, working with among others Krishnendu Chatterjee and Thomas Henzinger on Program Verification and Error Explanation.

Research Interests:

  • Automated Test Case Generation
  • Model Based Testing
  • Program Verification / Synthesis
  • Proof Compression

Publications:

2017
[4] Greedy pebbling for proof space compression
Andreas Fellner, Bruno Woltzenlogel Paleo
International Journal on Software Tools for Technology Transfer, pages 1-16, 6 2017.
[bibtex] [pdf] [doi]
[3] NP-completeness of small conflict set generation for congruence closure
Andreas Fellner, Pascal Fontaine, Bruno Woltzenlogel Paleo
Formal Methods in System Design, 2017.
[bibtex] [pdf] [doi]
2015
[2] Counterexample Explanation by Learning Small Strategies in Markov Decision Processes
Tomás Brázdil, Krishnendu Chatterjee, Martin Chmelik, Andreas Fellner, Jan Kretínský
Computer Aided Verification - 27th International Conference, CAV 2015, San Francisco, CA, USA, July 18-24, 2015, Proceedings, Part I, pages 158-177, 2015.
[bibtex] [pdf] [doi]
2014
[1] Skeptik: A Proof Compression System
Joseph Boudou, Andreas Fellner, Bruno Woltzenlogel Paleo
Automated Reasoning - 7th International Joint Conference, IJCAR 2014, Held as Part of the Vienna Summer of Logic, VSL 2014, Vienna, Austria, July 19-22, 2014. Proceedings, pages 374-380, 2014.
[bibtex] [pdf] [doi]

Address:
Andreas Fellner
Technische Universität Wien
Institut für Logic and Computation 192/4
Favoritenstraße 9–11
1040 Wien
Austria

Room: HA 03 02 (how to get there)
Phone:
Email: ta.etysrofnull@renllefa
Web: http://forsyte.at/~fellner/

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Latest News

FORSYTE organizes CAV 2018

The FORSYTE group is co-organizing the 30th International Conference on Computer Aided Verification (CAV), which will take place in Oxford from July 14-17, 2018, as part of the Federated Logic Conference (FLoC). CAV is the leading conference on theory and practice of computer-aided formal verification for hardware and software systems. The paper submission deadline is […]

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FMSD Special Issue in Memoriam Helmut Veith

In memory of Helmut Veith, the founder of the FORSYTE research group, the current issue of the Journal on Formal Methods in System Design is a Special Issue in Memoriam Helmut Veith. Helmut unexpectedly passed away in March 2016; he was a brilliant researcher, inspiring collaborator, passionate mentor, generous friend, and valued member of the […]

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Helmut Veith Stipend 2017: Deadline Extension (November 30)

The application deadline for the Helmut Veith Stipend 2017 has been extended to November 30. The stipend is dedicated to the memory of an outstanding computer scientist who worked in the fields of logic in computer science, computer-aided verification, software engineering, and computer security. We encourage all female master’s students attending (or planning to attend) […]

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Helmut Veith Stipend 2017

Outstanding female students in the field of computer science who pursue (or plan to pursue) one of the master‘s programs in Computer Science at TU Wien taught in English are invited to apply for the Helmut Veith Stipend

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