Our group has co-organized the Vienna Summer of Logic.

Research

Fundamental research topics include software model checking, test case generation, static analysis, protocol verification, and formal methods for distributed and concurrent systems. Industrial research is focusing on low level software, and embedded systems in the avionics and automotive sector.

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Teaching

We are offering courses in Formal Methods, Model Checking, Computer-Aided Verification, Abstract Interpretation, and Decision Procedures. We are always looking for enthusiastic young people who are interested in a research project or thesis in the Bachelor, Master, and PhD programs.

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Talks (details)

RiSE seminar
Philip Wadler
TBA
Thu, Jan 08 at 17:00
details

RiSE seminar
Christian Scheideler
TBA
Thu, Dec 04 at 17:00
TU Wien
details

RiSE seminar
Pavithra Prabhakar
TBA
Thu, Nov 27 at 17:00
IST Austria
details

VCLA
Vinay K. Chaudhri
An Architecture for Intelligence Using Prototypes, Composition and Analogy
Mon, Nov 24 at 12:00
Seminar room Goedel, Favoritenstraße 9-11
details

RiSE seminar
Nathan Wasser
TBA
Thu, Nov 20 at 17:00
TU Vienna
details

RiSE seminar
Ivan Radiček
Feedback Generation for Performance Problems in Introductory Programming Assignments
Thu, Nov 06 at 17:00
IST Austria
details

RiSE seminar
Richard Mayr
Techniques to solve computationally hard problems in automata theory
Tue, Nov 04 at 16:00
IST Austria
details

VCLA
Marco Maratea
Multi-Engine Answer Set Programming
Mon, Oct 27 at 15:00
Seminar room Gödel, Favoritenstraße 9-11, 1040 Vienna
details

RiSE seminar
Michael Elberfeld
Orienting Protein Interaction Networks
Thu, Oct 09 at 17:00
IST Austria
details

RiSE seminar
Johann A. Makowsky
Sets and Logic for CS: How to teach what is useful
Thu, Oct 09 at 15:00
TU Vienna
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VCLA
Johann A. Makowsky
Sets and Logic for CS: How to teach what is useful
Thu, Oct 09 at 15:00
Seminar room Gödel, (Favoritenstrasse 9-11, ground floor)
details

VCLA
Stefan Mengel
Understanding model counting for beta-acyclic CNF-formulas
Wed, Oct 08 at 11:00
Seminar room Gödel (Favoritenstraße 9-11, 1040 Vienna)
details

VCLA
Ringo Baumann
Context-free and Context-sensitive Kernels: Update and Deletion Equivalence in Abstract Argumentation
Tue, Sep 30 at 15:00
Seminar room Goedel, Favoritenstraße 9-11
details

VCLA
M. S. Ramanujan
Solving d-SAT via backdoors to small treewidth
Tue, Sep 30 at 11:00
Seminar room Goedel, Favoritenstraße 9-11
details

RiSE seminar
Steen Vester
Model-checking extensions of Alternating-time Temporal logics on One-counter game models
Tue, Sep 23 at 16:00
IST Austria
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VCLA
EunJung Kim
A parameterized algorithm for tree-cut width.
Mon, Jul 28 at 12:00
Seminar room Goedel, Favoritenstraße 9-11
details

VCLA
Jeff Z. Pan
Approximate Reasoning for Description Logics based Ontologies
Mon, Jul 14 at 15:00
Seminarroom von Neumann (Favoritenstrasse 9-11, ground floor)
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VCLA
Sebastian Ordyniak
A more general approach for Backdoor Sets into SAT and CSP
Thu, Jul 10 at 10:00
Seminar Room Menger, 3rd floor, Favoritenstraße 9-11
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VCLA
A linear-time algorithm for the orbit problem over cyclic groups
Tue, Jul 08 at 16:00
Seminar room 188/2, 4th floor of Favoritenstraße 9-11
details

RiSE seminar
Martin Rinard
TBA
Thu, Jan 01
IST Austria
details