Our group has co-organized the Vienna Summer of Logic.

Research

Fundamental research topics include software model checking, test case generation, static analysis, protocol verification, and formal methods for distributed and concurrent systems. Industrial research is focusing on low level software, and embedded systems in the avionics and automotive sector.

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Teaching

We are offering courses in Formal Methods, Model Checking, Computer-Aided Verification, Abstract Interpretation, and Decision Procedures. We are always looking for enthusiastic young people who are interested in a research project or thesis in the Bachelor, Master, and PhD programs.

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Talks (details)

RiSE seminar
Michael Elberfeld
TBA
Thu, Oct 09 at 17:00
IST Austria
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RiSE seminar
Steen Vester
Model-checking extensions of Alternating-time Temporal logics on One-counter game models
Tue, Sep 23 at 16:00
IST Austria
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VCLA
EunJung Kim
A parameterized algorithm for tree-cut width.
Mon, Jul 28 at 12:00
Seminar room Goedel, Favoritenstraße 9-11
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VCLA
Jeff Z. Pan
Approximate Reasoning for Description Logics based Ontologies
Mon, Jul 14 at 15:00
Seminarroom von Neumann (Favoritenstrasse 9-11, ground floor)
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VCLA
Sebastian Ordyniak
A more general approach for Backdoor Sets into SAT and CSP
Thu, Jul 10 at 10:00
Seminar Room Menger, 3rd floor, Favoritenstraße 9-11
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RiSE seminar
Anthony Widjaja Lin
A linear-time algorithm for the orbit problem over cyclic groups
Tue, Jul 08 at 17:00
TU Wien
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VCLA
A linear-time algorithm for the orbit problem over cyclic groups
Tue, Jul 08 at 16:00
Seminar room 188/2, 4th floor of Favoritenstraße 9-11
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RiSE seminar
Moritz Sinn
A Simple and Scalable Static Analysis for Bound Analysis and Amortized Complexity Analysis
Thu, Jul 03 at 17:00
IST Austria
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VCLA
Gábor Erdélyi
Algorithms and Elections
Thu, Jun 12 at 12:15
Seminar room Goedel, Favoritenstraße 9-11
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VCLA
Massimiliano Giacomin
An input/output characterization of abstract argumentation frameworks and semantics
Wed, Jun 04 at 10:00
Seminar room 187/2 (Favoritenstrasse 9-11, 2nd floor)
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RiSE seminar
Jakob Lechner
Mitigation of Transient Faults and Timing Variations in GALS Circuits
Thu, May 08 at 17:00
IST Austria
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VCLA
Jakob Lechner
Mitigation of Transient Faults and Timing Variations in GALS Circuits
Thu, May 08 at 17:00
Seminar room Zemanek, Favoritenstraße 9-11, 1040 Vienna ground floor
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RiSE seminar
Ori Lahav
Modular Reasoning about Heap Paths via Effectively Propositional Formulas
Tue, May 06 at 16:00
IST Austria
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VCLA
Son Cao Tran
Combining ASP and Prolog
Tue, Mar 25 at 12:00
lecture room FH HS7 (Wiedner Hauptstr. 8, yellow area, second floor)
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RiSE seminar
Arnd Hartmanns
Models, Tools and Techniques for Stochastic Timed Systems
Thu, Mar 13 at 17:00
IST Austria
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VCLA
M. S. Ramanujan
Parameterized Algorithms to Preserve Connectivity
Mon, Mar 03 at 17:00
Seminar room Goedel (Favoritenstrasse 9-11, ground floor, access through courtyard)
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RiSE seminar
Daniel Gebler
Compositional Metric Reasoning with Probabilistic Process Calculi
Thu, Feb 06 at 17:00
IST Austria
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RiSE seminar
Roland Meyer
Verification of Concurrent Programs under Relaxed Memory Models
Fri, Jan 31 at 16:30
IST Austria
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RiSE seminar
Franz Wotawa
Test automation – How far shall we go?
Thu, Jan 09 at 17:00
TU Wien
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VCLA
Matthias Mnich
A Complexity Dichotomy for the Steiner Multicut Problem
Wed, Jan 08 at 11:30
Zemanek seminar room (ground floor), Favoritenstraße 9-11, 1040 Vienna
details