Research

Fundamental research topics include software model checking, test case generation, static analysis, protocol verification, and formal methods for distributed and concurrent systems. Industrial research is focusing on low level software, and embedded systems in the avionics and automotive sector.

Learn more

Teaching

We are offering courses in Formal Methods, Model Checking, Computer-Aided Verification, Abstract Interpretation, and Decision Procedures. We are always looking for enthusiastic young people who are interested in a research project or thesis in the Bachelor, Master, and PhD programs.

Learn more

Talks (details)

RiSE seminar
Shaull Almagor
TBA
Tue, Jan 24 at 16:00
IST Austria
details

RiSE seminar
Malte Schwarzkopf
TBA
Wed, Dec 21
IST Austria
details

VCLA
Rupak Majumdar
[Software Testing] Hitting families of schedules
Tue, Dec 06 at 17:30
Seminarraum Argentinierstraße, Argentinierstraße 8, 1040 Vienna
details

RiSE seminar
Rupak Majumdar
[Software Testing] Hitting families of schedules
Tue, Dec 06 at 17:30
TU Wien
details

RiSE seminar
Mitra Tabaei
Effective Error Explanation Techniques for Concurrent Software
Wed, Nov 30 at 16:00
TU Wien
details

RiSE seminar
Dirk Beyer
Correctness Witnesses: Exchanging Verification Results between Verifiers
Thu, Nov 17 at 15:00
IST Austria
details

VCLA
Victor Dalmau
Approximation of MIN CSP
Mon, Nov 07 at 11:00
Seminar room Gödel, Favoritenstraße 9-11, 1040 Vienna (access through courtyard)
details

RiSE seminar
Jan Strejček
Partial but Precise Loop Summarization and Its Applications
Thu, Nov 03 at 17:00
IST Austria
details

RiSE seminar
Adrian Rebola Pardo
DRAT proofs for XOR reasoning
Thu, Nov 03 at 16:00
IST Austria
details

RiSE seminar
Johannes Kinder
High System-Code Security with Low Overhead
Thu, Oct 27 at 16:00
Seminarraum Argentinierstraße, Argentinierstraße 8
details

VCLA
Johannes Kinder
High System-Code Security with Low Overhead
Thu, Oct 27 at 16:00
Seminarraum Argentinierstraße, Argentinierstraße 8, 1040 Vienna
details

VCLA
Tomáš Vojnar
Abstraction Refinement and Antichains for Trace Inclusion of Infinite State Systems
Mon, Oct 24 at 17:00
Seminar room Zemanek, Favoritenstraße 9-11, 1040 Vienna
details

RiSE seminar
Tomáš Vojnar
Abstraction Refinement and Antichains for Trace Inclusion of Infinite State Systems
Mon, Oct 24 at 17:00
TU Wien, Favoritenstraße 9-11, Seminarraum Zemanek
details

VCLA
Evgenij Thorstensen
Self join elimination and new notions of query containment
Thu, Oct 20 at 12:00
Seminar room Gödel, Favoritenstraße 9-11, 1040 Vienna (access through courtyard)
details

RiSE seminar
Moritz Sinn
Complexity and Resource Bound Analysis of Imperative Programs using Difference Constraints
Wed, Oct 19 at 16:00
HS 6, Hauptgebäude, TU Wien
details

VCLA
Jörg Rothe
Economics and Computation: Five Challenges in Algorithmic Game Theory, Computational Social Choice, and Fair Division
Tue, Sep 20 at 11:00
EI 1 Petritsch lecture hall, Gußhausstr. 25-29, 2. Stock (CF 02 42)
details

VCLA
Martin Schäf
Classifying Bugs with Interpolants
Thu, Jun 30 at 17:00
Seminar Room 351 (room number CA0138), Gusshausstrasse 25-29, 1040 Vienna
details

VCLA
Igor Razgon
Lower bounds for branching programs of bounded repetition computing CNFs of bounded treewidth: an overview
Thu, Jun 23 at 16:00
Seminar room von Neumann, Favoritenstraße 9-11, 1040 Vienna (ground floor, access through courtyard)
details

VCLA
Leslie Lamport
A Mathematical View of Computer Systems – Q&A
Tue, May 31 at 18:00
Informatikhörsaal, Treitlstraße 3, 1040 Vienna
details

VCLA
Idit Keidar
Transactional Data Structure Libraries
Thu, May 12 at 17:00
Seminar room Zemanek, Favoritenstraße 9-11, 1040 Vienna
details

Latest News

WAIT 2016 in Vienna

The third WAIT workshop on induction is held between 17-18 November at the TU Wien. Details are available on the workshop page.

Continue reading

Two papers at POPL’17

Two papers co-authored by researchers from our group have been accepted for POPL’17: “Coming to Terms with Quantified Reasoning” by Simon Robillard, Andrei Voronkov, and Laura Kovacs; and “A Short Counterexample Property for Safety and Liveness Verification of Fault-tolerant Distributed Algorithms” by Igor Konnov, Marijana Lazic, Helmut Veith, and Josef Widder

Continue reading

Helmut Veith Stipend

Outstanding female students in the field of computer science who pursue (or plan to pursue) one of the master‘s programs in Computer Science at TU Wien taught in English are invited to apply for the Helmut Veith Stipend

Continue reading

LogicLounge in memoriam Helmut Veith

Will robots take away your job? In memory of Helmut Veith, this year’s Conference on Computer Aided Verification (CAV), which takes place in Toronto, will feature a LogicLounge on the effect of automation and artificial intelligence on our jobs.

Continue reading

Questions answered by Leslie Lamport

Leslie Lamport is going to answer questions about a Mathematical View of Computer Systems in Informatikhörsaal on Tuesday at 6pm. Check the announcement at the VCLA website and do not forget to watch the lecture beforehand.

Continue reading

Full news archive