Georg Weissenbacher

Georg Weissenbacher

Georg Weissenbacher
Technische Universität Wien
Institut für Informationssysteme 184/4
Favoritenstraße 9–11
1040 Wien

Room: HG 03 07 (how to get there)
Phone: +43 (1) 58801 – 184 35
Email: ta.etysrofnull@bnessiew

I’m leading the Rigorous Software Engineering lab of the Formal Methods in Systems Engineering Group. I’ve a master’s level degree from Graz University of Technology and a doctorate in computer science from Oxford University. Prior to my appointment in Vienna, I was a postdoctoral researcher at Princeton University.

My current research on the detection and explanation of Heisenbugs is funded by a Vienna Research Group for Young Investigators grant (stay tuned for publications on that topic).

A list of publications and my curriculum vitae is available from

Latest News

WAIT 2016 in Vienna

The third WAIT workshop on induction is held between 17-18 November at the TU Wien. Details are available on the workshop page.

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Two papers at POPL’17

Two papers co-authored by researchers from our group have been accepted for POPL’17: “Coming to Terms with Quantified Reasoning” by Simon Robillard, Andrei Voronkov, and Laura Kovacs; and “A Short Counterexample Property for Safety and Liveness Verification of Fault-tolerant Distributed Algorithms” by Igor Konnov, Marijana Lazic, Helmut Veith, and Josef Widder

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Helmut Veith Stipend

Outstanding female students in the field of computer science who pursue (or plan to pursue) one of the master‘s programs in Computer Science at TU Wien taught in English are invited to apply for the Helmut Veith Stipend

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LogicLounge in memoriam Helmut Veith

Will robots take away your job? In memory of Helmut Veith, this year’s Conference on Computer Aided Verification (CAV), which takes place in Toronto, will feature a LogicLounge on the effect of automation and artificial intelligence on our jobs.

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