Talks

We regularly host talks in the RiSE seminar and VCLA talks series. The following table summarizes the latest talks in each series – for detailed information or previous talks, please follow the links to the respective websites.

Logo ARiSEVCLA Logo

Georg GottlobKnowledge Processing, Logic, and the Future of AIThu, Jan 14 at 17:00Online (Vienna)details
Torsten SchaubDynamic Answer Set ProgrammingFri, Dec 13 at 14:15Seminarraum FAV 01 C…details
Joost-Pieter Katoen Probabilistic Programming: Machine Learning for the Masses?Wed, Dec 04 at 10:30Kontaktraum, Gußhau…details
Dominique Larchey-WendlingHilbert’s Tenth Problem in CoqWed, Nov 27 at 16:30Seminar Room Gödel,…details
Tommaso Moraschini Profinite Heyting algebras and the representation problem for Esakia spacesWed, Nov 20 at 16:30Seminarraum FAV EG C…details
Prafullkumar TaleLossy Kernels for Graph Contraction ProblemsMon, Nov 11 at 14:00Library of the Algor…details
Lutz StrassburgerCombinatorial Proofs and Decomposition Theorems for First-order LogicThu, Jan 01details
Hans van DitmarschOne Hundred Prisoners and a Light BulbThu, Jan 01Seminarraum FAV 01, …details
Joscha BachCognitive AI: From AI models to mental representations?Thu, Jan 01Virtual details
Cory DoctorowWorking as Intended -- Surveillance Capitalism is not a Rogue CapitalismThu, Jan 01VIRTUAL details

Latest News

Winter School on Verification

The Austrian Society for Rigorous Systems Engineering (ARiSE) and the Vienna Center for Logic and Algorithms (VCLA) are organizing a joint winter school on verification at Vienna University of Technology from 6-10 February 2012. Apart from ARiSE/VCLA students, the school will be open to outside students. Details are available from the VCLA website.

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CfP: Workshop on Exploiting Concurrency Efficiently and Correctly (EC^2 2010)

The annual Workshop on Exploiting Concurrency Efficiently and Correctly (EC2) is a forum that brings together researchers working on formal methods for concurrency, and those working on advanced parallel applications. Its goal is to stimulate incubation of ideas leading to future concurrent system design an verification tools that are essential in the multi-core era.

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