Josef Widder’s ACM Author-izer Links

ACM DL Author-ize serviceBrief announcement: full reversal routing as a linear dynamical system

Bernadette Charron-Bost, Matthias Fuegger, Jennifer L. Welch, Josef Widder
SPAA ’11 Proceedings of the twenty-third annual ACM symposium on Parallelism in algorithms and architectures, 2011
ACM DL Author-ize serviceRouting without ordering

Bernadette Charron-Bost, Antoine Gaillard, Jennifer Welch, Josef Widder
SPAA ’09 Proceedings of the twenty-first annual symposium on Parallelism in algorithms and architectures, 2009
ACM DL Author-ize serviceOptimal message-driven implementations of omega with mute processes

Martin Biely, Josef Widder
ACM Transactions on Autonomous and Adaptive Systems (TAAS), 2009
ACM DL Author-ize serviceTolerating corrupted communication

Martin Biely, Josef Widder, Bernadette Charron-Bost, Antoine Gaillard, Martin Hutle, André Schiper
PODC ’07 Proceedings of the twenty-sixth annual ACM symposium on Principles of distributed computing, 2007
ACM DL Author-ize serviceBrief announcement: on the possibility and the impossibility of message-driven self-stabilizing failure detection

Martin Hutle, Josef Widder
PODC ’05 Proceedings of the twenty-fourth annual ACM symposium on Principles of distributed computing, 2005

Latest News

Winter School on Verification

The Austrian Society for Rigorous Systems Engineering (ARiSE) and the Vienna Center for Logic and Algorithms (VCLA) are organizing a joint winter school on verification at Vienna University of Technology from 6-10 February 2012. Apart from ARiSE/VCLA students, the school will be open to outside students. Details are available from the VCLA website.

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CfP: Workshop on Exploiting Concurrency Efficiently and Correctly (EC^2 2010)

The annual Workshop on Exploiting Concurrency Efficiently and Correctly (EC2) is a forum that brings together researchers working on formal methods for concurrency, and those working on advanced parallel applications. Its goal is to stimulate incubation of ideas leading to future concurrent system design an verification tools that are essential in the multi-core era.

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