Thanh-Hai Tran

» Project assistant, PhD student

I am a Ph.D. candidate under the supervision of Dr. Igor Konnov and Dr. Josef Widder in the LogiCS program at TU Wien. I am currently working on the APALACHE project to develop a symbolic model checker for TLA+, and develop verification techniques for failure detectors in distributed algorithms.

My main interests are in formal verification, distributed algorithms, and decision procedures. I also have broader interests in computer science education, cryptography, and security.

I have received my MSc in Computer Science from the European Master Program in Computational Logic. In my master program, I had chances to study in TU Dresden, Free University of Bozen-Bolzano, and TU Wien. Prior to this, I obtained my BSc in Computer Science from University of Science, Vietnam National University – Ho Chi Minh City.


Fun

I am Vietnamese, and our first names often have meaning behind them. For example, Thanh is blue, and Hai is an ocean. So, my first name means a blue ocean. It is beautiful, but very popular in Vietnamese. The 14 most popular last names in Vietnam account for well over 90 percent of the population. We have more first names but not as many as in Western countries.

My Github account “banhday” is a Vietnamese traditional cake which is a white, flat, and round glutinous rice cake. It symbolizes the Sky, and we usually eat it in the Lunar New Year holiday.


Publications

2020
[3] Extracting symbolic transitions from TLA+ specifications
Jure Kukovec, Thanh-Hai Tran, Igor Konnov
Science of Computer Programming, volume 187, pages 102361, 2020.
[bibtex] [pdf] [doi]
2019
[2] TLA+ model checking made symbolic
Igor Konnov, Jure Kukovec, Thanh-Hai Tran
PACMPL, volume 3, number OOPSLA, pages 123:1–123:30, 2019.
[bibtex] [pdf]
2018
[1] Extracting Symbolic Transitions from TLA+ Specifications
Jure Kukovec, Thanh-Hai Tran, Igor Konnov
Abstract State Machines, Alloy, B, TLA, VDM, and Z, pages 89–104, 2018.
[bibtex] [pdf] [doi]

Pre-TUW

 

Technical reports

Address:
Thanh Hai Tran
Technische Universität Wien
Institut für Logic and Computation 192/4
Favoritenstraße 9–11
1040 Wien
Austria

Room: HA 03 02 (how to get there)
Phone: +43 (1) 58801 – 740 04
Fax: +43 (1) 58801 – 9740 04
Email: tran@forsyte.at
Web: http://forsyte.at/~tran/
https://github.com/banhday

Latest News

Winter School on Verification

The Austrian Society for Rigorous Systems Engineering (ARiSE) and the Vienna Center for Logic and Algorithms (VCLA) are organizing a joint winter school on verification at Vienna University of Technology from 6-10 February 2012. Apart from ARiSE/VCLA students, the school will be open to outside students. Details are available from the VCLA website.

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CfP: Workshop on Exploiting Concurrency Efficiently and Correctly (EC^2 2010)

The annual Workshop on Exploiting Concurrency Efficiently and Correctly (EC2) is a forum that brings together researchers working on formal methods for concurrency, and those working on advanced parallel applications. Its goal is to stimulate incubation of ideas leading to future concurrent system design an verification tools that are essential in the multi-core era.

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