Laura Kovács

Laura Kovacs

Laura Kovács
Technische Universität Wien
Institut für Logic and Computation 192/4
Favoritenstraße 9–11
1040 Wien

Room: HG 03 15 (how to get there)
Phone: +43 (1) 58801 – 184 30

I am a full professor in computer science at the TU Wien, leading the automated program reasoning (APRe) group of the Formal Methods in Systems Engineering Division. I also hold a part-time professorship at the Department of Computer Science and Engineering of the Chalmers University of Technology.

My research focuses on the design and development of new theories, technologies, and tools for program analysis, with a particular focus on automated assertion generation, symbolic summation, computer algebra, and automated theorem proving. I am the co-developer of the Vampire theorem prover. In 2014, I received the Wallenberg Academy Fellowship and an ERC Starting Grant.

  • Curriculum Vitae and Publications: Download CV and publication list
  • Possible topics for master/bachelor thesis:
    • deductive verification (using e.g. Hoare logic, weakest preconditions);
    • automating the generation of program assertions, such as loop invariants and ranking functions;
    • static analysis of deterministic and probabilistic programs;
    • first-order theorem proving in support of software verification;
    • safety and relational verification.

Please visit my personal web-page at for further and up-to-date details. 

Latest News

Winter School on Verification

The Austrian Society for Rigorous Systems Engineering (ARiSE) and the Vienna Center for Logic and Algorithms (VCLA) are organizing a joint winter school on verification at Vienna University of Technology from 6-10 February 2012. Apart from ARiSE/VCLA students, the school will be open to outside students. Details are available from the VCLA website.

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CfP: Workshop on Exploiting Concurrency Efficiently and Correctly (EC^2 2010)

The annual Workshop on Exploiting Concurrency Efficiently and Correctly (EC2) is a forum that brings together researchers working on formal methods for concurrency, and those working on advanced parallel applications. Its goal is to stimulate incubation of ideas leading to future concurrent system design an verification tools that are essential in the multi-core era.

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