Bernhard Gleiss

Project assistant, PhD student

I am a PhD student with Laura Kovács. I graduated with a Dipl.-Ing. degree in Computational Intelligence from TU Wien in 2016. Prior to this, I obtained my BSc in Math from Universität Wien.

My PhD work focuses on software verification using superposition-based first-order theorem proving. As part of this work, I’m developing the SPECTRE verification tool.

In 2017, I visited Arie Gurfinkel at the University of Waterloo, where I worked on optimizing the Z3 Horn Clause engine Spacer.

Research Interests

  • Software Verification
  • First-order Theorem Proving
  • Induction, Horn Clause Solving

 

Address:
Bernhard Gleiss
Technische Universität Wien
Institut für Logic and Computation 192/4
Favoritenstraße 9–11
1040 Wien
Austria

Room: HE 03 05 (how to get there)
Phone: +43 (1) 58801 – 740 040
Email: ta.etysrofnull@ssielgb
Web: http://forsyte.at/~gleiss/

Latest News

Winter School on Verification

The Austrian Society for Rigorous Systems Engineering (ARiSE) and the Vienna Center for Logic and Algorithms (VCLA) are organizing a joint winter school on verification at Vienna University of Technology from 6-10 February 2012. Apart from ARiSE/VCLA students, the school will be open to outside students. Details are available from the VCLA website.

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CfP: Workshop on Exploiting Concurrency Efficiently and Correctly (EC^2 2010)

The annual Workshop on Exploiting Concurrency Efficiently and Correctly (EC2) is a forum that brings together researchers working on formal methods for concurrency, and those working on advanced parallel applications. Its goal is to stimulate incubation of ideas leading to future concurrent system design an verification tools that are essential in the multi-core era.

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