Moritz Sinn

Moritz Sinn

Address:
Moritz Sinn
Technische Universität Wien
Institut für Logic and Computation 192/4
Favoritenstraße 9–11
1040 Wien
Austria

Room: HE 03 09 (how to get there)
Phone: +43 (1) 58801 – 184 07
Email: ta.etysrofnull@nnis
Web: http://forsyte.at/~sinn/

I am the main developer of the program analysis tool loopus. loopus analyzes C programs and can statically determine bounds on the number loop iterations and on program complexity.

Publications

2017
[6] Complexity and Resource Bound Analysis of Imperative Programs Using Difference Constraints
Moritz Sinn, Florian Zuleger, Helmut Veith
Journal of Automated Reasoning, pages 1-43, 2017.
[bibtex] [pdf] [doi]
2016
[5] Automated Complexity Analysis for Imperative Programs
Moritz Sinn
2016, PhD thesis, TU Wien, Faculty of Informatics.
[bibtex] [pdf]
2015
[4] Difference Constraints: An adequate Abstraction for Complexity Analysis of Imperative Programs
Moritz Sinn, Florian Zuleger, Helmut Veith
Formal Methods in Computer-Aided Design (FMCAD) (Roope Kaivola, Thomas Wahl, eds.), pages 144-151, 2015, IEEE.
[bibtex] [pdf]
2014
[3] A Simple and Scalable Static Analysis for Bound Analysis and Amortized Complexity Analysis
Moritz Sinn, Florian Zuleger, Helmut Veith
Chapter in Computer Aided Verification - 26th International Conference, CAV 2014, Held as Part of the Vienna Summer of Logic, VSL 2014, Vienna, Austria, July 18-22, 2014. Proceedings, pages 745-761, 2014.
[bibtex] [pdf] [doi]
2011
[2] Bound analysis of imperative programs with the size-change abstraction
Florian Zuleger, Sumit Gulwani, Moritz Sinn, Helmut Veith
Proceedings of the 18th international conference on Static analysis, pages 280-297, 2011, Springer-Verlag.
[bibtex] [pdf]
2010
[1]Loopus - A Tool for Computing Loop Bounds for C Programs
Florian Zuleger, Moritz Sinn
Proceedings of the 3rd Workshop on Invariant Generation (WING), 2010.
[bibtex]

Latest News

Winter School on Verification

The Austrian Society for Rigorous Systems Engineering (ARiSE) and the Vienna Center for Logic and Algorithms (VCLA) are organizing a joint winter school on verification at Vienna University of Technology from 6-10 February 2012. Apart from ARiSE/VCLA students, the school will be open to outside students. Details are available from the VCLA website.

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CfP: Workshop on Exploiting Concurrency Efficiently and Correctly (EC^2 2010)

The annual Workshop on Exploiting Concurrency Efficiently and Correctly (EC2) is a forum that brings together researchers working on formal methods for concurrency, and those working on advanced parallel applications. Its goal is to stimulate incubation of ideas leading to future concurrent system design an verification tools that are essential in the multi-core era.

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