We regularly host talks in the RiSE seminar and VCLA talks series. The following table summarizes the latest talks in each series – for detailed information or previous talks, please follow the links to the respective websites.


RiSE seminarVeselin RaychevTBATue, Sep 26 at 17:00IST Austriadetails
RiSE seminarJean-Pierre TalpinModel Checking the Flooding Time Synchronization ProtocolFri, Jun 30 at 13:00TU Wiendetails
RiSE seminarWojciech CzerwińskiRegular separability of one-countersMon, Jun 26 at 17:00IST Austriadetails
RiSE seminarFrantišek BlahoudekAdvances in omega-automata for formal methodsWed, Jun 21 at 17:00IST Austriadetails
RiSE seminarZvonimir Rakamaric SMACK Software Verification ToolchainWed, Jun 07 at 17:00TU Wiendetails
RiSE seminarZvonimir RakamarićAnalysis and Synthesis of Floating-Point RoutinesTue, Jun 06 at 17:00IST Austriadetails
RiSE seminarAndrei VoronkovFirst-Order Interpolation and Interpolating Proofs SystemsWed, May 31 at 17:00TU Wiendetails
Odile PapiniPrioritized Assertional-Based Removed Sets Revision of DL-Lite Belief BasesWed, May 31 at 14:10Seminar Room Goedel,…details
RiSE seminarKarel HorákValue iteration in stochastic games of imperfect informationTue, May 23 at 17:00IST Austriadetails
RiSE seminarMaximilian JaroschekWHILE (looking for invariants) DO algebraTue, May 02 at 10:30TU Wiendetails
RiSE seminarJoost-Pieter KatoenPrinciples of Probabilistic ProgrammingThu, Apr 20 at 17:15IST Austriadetails
Vladislav Ryzhikov and Michael Zakharyaschev Horn fragments of temporal logics and ontology-based access to temporal data Wed, Mar 22 at 11:10Seminarroom Zemanek,…details
Danny HermelinFractals for Kernelization Lower BoundsMon, Mar 06 at 11:30 Seminarraum von Neu…details
Ondřej KunčarCoCon: A Non-Leaking Conference SystemThu, Feb 23 at 16:00Seminarroom Menger, …details
Filippo BonchiFull Abstraction for Signal Flow GraphsTue, Feb 21 at 17:30Seminarraum Zemanek,…details
Rupak Majumdar[Software Testing] Hitting families of schedulesTue, Dec 06 at 17:30Seminarraum Argentin…details
Victor DalmauApproximation of MIN CSPMon, Nov 07 at 11:00Seminar room Gödel,…details
Johannes KinderHigh System-Code Security with Low OverheadThu, Oct 27 at 16:00Seminarraum Argentin…details
Tomáš VojnarAbstraction Refinement and Antichains for Trace Inclusion of Infinite State SystemsMon, Oct 24 at 17:00Seminar room Zemanek…details
Evgenij ThorstensenSelf join elimination and new notions of query containment Thu, Oct 20 at 12:00Seminar room Gödel,…details

Latest News

Winter School on Verification

The Austrian Society for Rigorous Systems Engineering (ARiSE) and the Vienna Center for Logic and Algorithms (VCLA) are organizing a joint winter school on verification at Vienna University of Technology from 6-10 February 2012. Apart from ARiSE/VCLA students, the school will be open to outside students. Details are available from the VCLA website.

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CfP: Workshop on Exploiting Concurrency Efficiently and Correctly (EC^2 2010)

The annual Workshop on Exploiting Concurrency Efficiently and Correctly (EC2) is a forum that brings together researchers working on formal methods for concurrency, and those working on advanced parallel applications. Its goal is to stimulate incubation of ideas leading to future concurrent system design an verification tools that are essential in the multi-core era.

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