Temporal Logic Model Checking (bibtex)
by Edmund M. Clarke, Ansgar Fehnker, Sumit Kumar Jha, Helmut Veith
Reference:
Temporal Logic Model CheckingEdmund M. Clarke, Ansgar Fehnker, Sumit Kumar Jha, Helmut VeithChapter in Handbook of Networked and Embedded Control Systems (Dimitrios Hristu-Varsakelis, William S. Levine, eds.), pages 539-558, 2005, Birkhäuser.
Bibtex Entry:
@incollection{DBLP:books/sp/necs2005/ClarkeFJV05,
  author = {Edmund M. Clarke and Ansgar Fehnker and Sumit Kumar Jha and Helmut   Veith},
  title = {Temporal Logic Model Checking},
  year = {2005},
  booktitle = {Handbook of Networked and Embedded Control Systems},
  editor = {Dimitrios Hristu-Varsakelis and William S. Levine},
  pages = {539--558},
  publisher = {Birkh{\"a}user},
  isbn = {0-8176-3239-5}
}
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