Moritz Sinn

Moritz Sinn

Moritz Sinn
Technische Universität Wien
Institut für Logic and Computation 192/4
Favoritenstraße 9–11
1040 Wien

Room: HE 03 09 (how to get there)
Phone: +43 (1) 58801 – 184 07
Email: ta.etysrofnull@nnis

I am the main developer of the program analysis tool loopus. loopus analyzes C programs and can statically determine bounds on the number loop iterations and on program complexity.


[6] Complexity and Resource Bound Analysis of Imperative Programs Using Difference Constraints
Moritz Sinn, Florian Zuleger, Helmut Veith
Journal of Automated Reasoning, pages 1-43, 2017.
[bibtex] [pdf] [doi]
[5] Automated Complexity Analysis for Imperative Programs
Moritz Sinn
2016, PhD thesis, TU Wien, Faculty of Informatics.
[bibtex] [pdf]
[4] Difference Constraints: An adequate Abstraction for Complexity Analysis of Imperative Programs
Moritz Sinn, Florian Zuleger, Helmut Veith
Formal Methods in Computer-Aided Design (FMCAD) (Roope Kaivola, Thomas Wahl, eds.), pages 144-151, 2015, IEEE.
[bibtex] [pdf]
[3] A Simple and Scalable Static Analysis for Bound Analysis and Amortized Complexity Analysis
Moritz Sinn, Florian Zuleger, Helmut Veith
Chapter in Computer Aided Verification - 26th International Conference, CAV 2014, Held as Part of the Vienna Summer of Logic, VSL 2014, Vienna, Austria, July 18-22, 2014. Proceedings, pages 745-761, 2014.
[bibtex] [pdf] [doi]
[2] Bound analysis of imperative programs with the size-change abstraction
Florian Zuleger, Sumit Gulwani, Moritz Sinn, Helmut Veith
Proceedings of the 18th international conference on Static analysis, pages 280-297, 2011, Springer-Verlag.
[bibtex] [pdf]
[1]Loopus - A Tool for Computing Loop Bounds for C Programs
Florian Zuleger, Moritz Sinn
Proceedings of the 3rd Workshop on Invariant Generation (WING), 2010.

Latest News

FORSYTE organizes CAV 2018

The FORSYTE group is co-organizing the 30th International Conference on Computer Aided Verification (CAV), which will take place in Oxford from July 14-17, 2018, as part of the Federated Logic Conference (FLoC). CAV is the leading conference on theory and practice of computer-aided formal verification for hardware and software systems. The paper submission deadline is […]

Continue reading

FMSD Special Issue in Memoriam Helmut Veith

In memory of Helmut Veith, the founder of the FORSYTE research group, the current issue of the Journal on Formal Methods in System Design is a Special Issue in Memoriam Helmut Veith. Helmut unexpectedly passed away in March 2016; he was a brilliant researcher, inspiring collaborator, passionate mentor, generous friend, and valued member of the […]

Continue reading

Helmut Veith Stipend 2017: Deadline Extension (November 30)

The application deadline for the Helmut Veith Stipend 2017 has been extended to November 30. The stipend is dedicated to the memory of an outstanding computer scientist who worked in the fields of logic in computer science, computer-aided verification, software engineering, and computer security. We encourage all female master’s students attending (or planning to attend) […]

Continue reading

Helmut Veith Stipend 2017

Outstanding female students in the field of computer science who pursue (or plan to pursue) one of the master‘s programs in Computer Science at TU Wien taught in English are invited to apply for the Helmut Veith Stipend

Continue reading

Full news archive